Recently, with higher function of electronic equipments, the drive frequency is advancing towards higher frequency in the semiconductor element. With advancement towards higher frequency, a phenomenon in which the voltage temporarily lowers due to coil component and resistor component of the power supply wiring tends to easily occur when switching is performed with a circuit spaced apart from the power supply, which becomes a cause of malfunction of the semiconductor element. A bypass capacitor is connected between a power supply line of a circuit board mounted with the semiconductor element and a ground line to ensure stable power supply voltage and realize normal operation of the semiconductor element.
In order to exhibit the effect to its maximum, the capacitor needs to be arranged at a position as close as possible to the semiconductor element so as not to be influenced by the resistor component and the coil component of the wiring. This is handled in the related art by arranging the capacitor on the substrate mounted with the semiconductor element or the mother board to which the relevant substrate is further mounted. However, as the demand for miniaturization of the equipment became stricter, reduction of the region mounted with the capacitor is being desired.
As shown in patent document 1, attempt has been made to miniaturize the equipment by embedding the capacitor component in the circuit board and reducing the mounting area.
FIG. 4 shows a structure of a conventional passive component incorporating interposer. In FIG. 4, the conventional passive component incorporating interposer includes double-sided circuit board 1 including wiring layers 8 on both sides, passive component 2 mounted on one surface of double-sided circuit board 1, second insulating layer 3 laminated on a surface of double-sided circuit board 1 mounted with passive component 2, first insulating layer 4 laminated on the other surface of double-sided circuit board 1 not mounted with passive component 2, second wiring layer 6 laminated on second insulating layer 3, first wiring layer 5 laminated on first insulating layer 4, and through holes 7 for electrically connecting wiring layer 8, first wiring layer 5, and second wiring layer 6, where semiconductor element 9 is mounted on second wiring layer 6.
However, since passive component 2 is disposed arranged between semiconductor element 9 and inner layer wiring layer in the structure of the conventional passive component incorporating interposer, the wiring length for connecting semiconductor element 9 and passive component 2 becomes long, and the effectiveness of power supply voltage stabilization reduces even if a chip capacitor (not shown) is mounted as passive component 2. In order to avoid this, consideration is made in shortening the wiring length for connecting semiconductor element 9 and passive component 2 using two double-sided circuit boards 1, as shown in FIG. 5, but the cost increases since two expensive double-sided circuit boards 1 are used. In the structure of connecting semiconductor element 9 and passive component 2 using two double-sided circuit boards 1, through holes 7 need to be formed after aligning the wired patterns in advance, and thus the man-hour of the work increase, which becomes a problem in terms of mass production.    [Patent document 1] Unexamined Japanese Patent Publication No. 54-104564